Posted: Wednesday, March 14, 2018 6:37 PM
Location: Boise, ID or Milpitas, CA
As a NAND Product Development Engineer at Micron Technology, Inc., you will be responsible for optimizing the performance and reliability of our NAND products to meet the unique specifications and usage models for our customers, both internal and external.
:Prior to first silicon of the NAND product, you will:
:run simulations to learn and create documentation covering the read, program, and erase operations of the NAND product, as well as the related configuration, voltage, and timing registers to optimize those operations;
:conduct paper studies based on models and silicon data from previous products to project the performance and reliability capability for various usage models, and provide feedback to the business unit on the tradeoffs to optimize product capability; and
:generate and propose an initial set of configuration, voltage, and timing register settings to be used for first silicon.
:After receiving first silicon of the NAND product, you will:
:use test equipment and data analysis tools/scripts to characterize the read margins, performance, and reliability of the product;
:design and execute experiments to characterize the response of read margins, performance, reliability, and manufacturing yield to various configuration, voltage, and timing registers;
:propose and implement changes to register settings or program/read/erase waveforms to improve product capability toward achievement of product performance and reliability goals;
:identify, propose, and implement corrective actions for any issues that are identified through qualification, to ensure that our products meet the necessary performance and reliability specifications before shipping product to our internal and external customers; and
:engage with internal SSD and Managed NAND development teams to ensure the NAND product is well:optimized for its intended systems, and to provide input on system media management techniques and algorithms to get optimal performance and reliability from the NAND.
:Additionally, you will:
:propose enhancements to the read, program, and erase algorithms of future NAND products, based on your learnings from read margin characterization and optimization;
:define algorithms to be implemented in our production test flows to better optimize read margins, performance, reliability, and yield at a die:level, and to reduce variation across the manufacturing line; and
:participate in cross:functional efforts to document, standardize, and improve our capability to characterize and optimize future products.
Successful candidates for this position will demonstrate:
:Strong knowledge of NAND memory cell operation, device physics, and reliability mechanisms
:Strong knowledge of NAND program, erase, and read algorithms and operations
:Strong background in NAND product and device characterization
:Good familiarity with semiconductor memory fabrication processes
:Good working knowledge in statistics and probability
:Some background in computer programming or scripting languages. Knowledge of Perl, Python, and/or Matlab is desirable.
:Effective communication skills in written and spoken English
:Good multitasking and organizational skills
:Ability to delegate tasks and set priorities in a team environment
:Excellent problem solving skills
:Strong presentation skills
:Excellent project management skills
:Strong self:motivation and enthusiasm
Position requires a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Physics, or related disciplines, plus a minimum of 3:5 years of experience in NAND product development.
We recruit, hire, train, promote, discipline and provide other conditions of employment without regard to a persons race, color, religion, sex, age, national origin, disability, sexual orientation, gender identity and expression, pregnan
• Location: San Jose / South Bay
• Post ID: 97108787 sanjose